1. Field of the Invention
The present invention relates to a switching device such as a phototriac or a photothyristor including a MOSFET for zero crossing, and more particularly to prevent breakdown of a gate insulating film of a MOSFET.
2. Description of the Background Art
FIG. 5 schematically shows a sectional view of a conventional phototriac. This phototriac has first and second P.sup.+ type gate regions 2 and 3, and P.sup.+ type anode regions 4 and 5 outwards thereof formed symmetrically at the surface layer of an N type semiconductor substrate 1. First and second N.sup.+ type cathode regions 14 and 15 are formed in the surface layer of first and second P.sup.+ type gate regions 2 and 3, respectively.
More specifically, a first thyristor includes P.sup.+ type anode region 4, N type substrate 1, P.sup.+ type gate region 2, and N.sup.+ type cathode region 14. A second thyristor includes P.sup.+ type anode region 5, N type substrate 1, P.sup.+ gate region 3, and N.sup.+ type cathode region 15.
Each of first and second P.sup.+ type anode regions 4 and 5 has a rectangular annular configuration. More specifically, anode regions 4 and 5 illustrated as two regions isolated from each other in the sectional view of FIG. 1 represent different portions of one continuous ring. First and second P.sup.- type well regions 6 and 7 are formed inwards of first and second anode regions 4 and 5.
In the surface layer of first and second well regions 6 and 7, first and second source regions 8 and 9 of N.sup.+ type, and then first and second drain regions 10 and 11 of N.sup.+ type are respectively formed. Between first source region 8 and first drain region 10, a first gate oxide film 12 and a first gate electrode 19 are stacked on first well region 6. Similarly, between second source region 9 and second drain region 11, a second gate oxide film 13 and a second gate electrode 20 are stacked on second well region 7.
More specifically, a first MOSFET includes well 6, source 8, drain 10, gate oxide film 12, and gate electrode 19. Similarly, a second MOSFET includes well 7, source 9, drain 11, gate oxide film 13, and gate electrode 20. These MOSFETs supply a zero crossing function to the phototriac of FIG. 5.
The surface of N type substrate 1 is covered with a semi-insulative polysilicon 16 having oxygen doped for passivation. The impurity concentration of N type substrate 1 is generally 10.sup.13 -10.sup.15 cm.sup.-3. Semi-insulative, oxygen-doped polysilicon film 16 is used as a passivation film for the purpose of suppressing reduction of breakdown voltage of the device by preventing the potential in the lead wire connected to gate electrodes 19 and 20 of the MOSFET from affecting the surface of N type substrate 1.
A silicon nitride film 17 is stacked on semi-insulative polysilicon film 16, which is covered with a silicon oxide film 18.
First and second connection terminals T.sub.1 and T.sub.2 are used for electrical connection with an external circuit. First terminal T.sub.1 is connected to first anode region 4, second cathode region 15, and first source region 8 via respective corresponding electrodes (hatched in FIG. 5). Second terminal T.sub.2 is connected to second anode region 5, first cathode region 14 and second source region 9 via corresponding electrodes.
First drain region 10 is connected to second gate region 3, and second drain region 11 is connected to first gate region 2. First gate region 2 and first cathode region 14 are connected via a first resistor 21, and second gate region 3 and second cathode region 15 are connected via a second resistor 22. Although resistors 21 and 22 are represented in symbols of circuit elements in FIG. 5, they are actually formed by ion implantation into the surface layer of N type substrate 1. Gate electrodes 19 and 20 are connected to an N.sup.+ type channel stopper 23 formed at a peripheral portion of N type substrate 1.
FIG. 6 is an equivalent circuit diagram representing the switching device of FIG. 5. It can be appreciated from FIG. 6 that a pair of thyristors each having a PNPN structure are connected in parallel in opposite directions between the two terminals T.sub.1 and T.sub.2. These thyristors are controlled by two MOSFETs having corresponding gate electrodes 19 and 20. More specifically, these thyristors operate to pass current only when the voltage applied across terminals T.sub.1 and T.sub.2 is lower than the threshold voltage of the corresponding MOSFET and when the corresponding gate regions 2 and 3 receive light.
The breakdown voltage of the phototriac of FIG. 5 is determined by the factors of:
(1) the impurity concentration of N type substrate 1;
(2) the depth of P type gate regions 2 and 3, and anode regions 4 and 5;
(3) the planar pattern of P type gate electrodes 2 and 3, and anode regions 4 and 5;
(4) the oxygen concentration in semi-insulative polysilicon film 16;
where (1) has the greatest dominance.
The breakdown voltage of the gate of the MOSFET is determined by the factors:
(1) the thickness of gate oxide films 12 and 13; and
(2) the thickness of silicon oxide film 18 (generally formed by CVD) beneath the lead wire connecting gate electrodes 19 and 20 to channel stopper 23.
The gate oxide film must be an oxide film of high quality, and is generally formed by thermal oxidation. The thickness of the gate oxide film is approximately 1.2 .mu.m in light of the manufacturing process. Phosphorus is lightly diffused from the surface of the gate oxide film for the purpose of gettering Na.sup.+ ions in the gate oxide film which will cause instability in the threshold voltage of the MOSFET. The diffusion depth of phosphorus into the gate oxide film is approximately 1000 .ANG., for example. The breakdown voltage of the gate oxide film is approximately 900-1000 volts.
When the resistivity of N type substrate 1 is approximately 40 .OMEGA..cm and approximately 30% of oxygen is doped into semi-insulative polysilicon film 16, the breakdown voltage of the phototriac is approximately 700-900 volts.
This means that if the breakdown voltage of the phototriac is the higher value of approximately 900 volts due to variation in the resistivity of N type substrate 1, there will be no margin with respect to the breakdown voltage of approximately 900-1000 volts of the MOSFET. Therefore, there is a problem in that the MOSFET breaks down prior to the breakdown of the phototriac because of the voltage is also applied across terminals T.sub.1 and T.sub.2 applied to both sides of the gate oxide film of the MOSFET.